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Uttarakhand PMT Uttarakhand PMT Solved Paper-2010

  • question_answer
    The output Y of the logic circuit shown in figure is best represented as

    A)  \[\overline{A}+\overline{B.C}\]        

    B)  \[A+\overline{B.}\]

    C)  \[\overline{A+B.C}\]    

    D)  \[A+\overline{B.}\,C\]

    Correct Answer: D

    Solution :

     At logic gate\[I,\]the Boolean expression is \[\overline{B}.c=Y\] At logic gate\[II,\]the Boolean expression is \[A+(\overline{B}+C)=Y\] At logic gate\[III,\]the Boolean expression is \[\overline{A+(\overline{B}.C)}=Y\]


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