question_answer

Following diagram performs the logic function of:                                      [AIPMT 2003]

A)        OR gate           

B)       AND gate

C)  XOR gate

D)      NAND gate

Correct Answer: B

Solution :

For our convenience, the output of first NAND gate is chosen as X as shown

Output of first NAND gate,

\[X=\overline{A\,.\,B}\]

So,       \[X=\bar{A}+\bar{B}\]

Now, output of 2nd NAND gate,

\[Y=\bar{X}\,=\overline{\bar{A}+\bar{B}}\]

Again,   \[\overline{\bar{A}+\bar{B}}=\bar{\bar{A}}+\bar{\bar{B}}=A.\,B\,(\because \,\,\bar{\bar{A}}=\bar{A})\]

Hence, \[Y=A.B\]

This is the logic function of AND gate.