question_answer

Following diagram performs logic function of

A)  AND gate                     

B)  NAND gate

C)  XOR gate                     

D)  OR gate

Correct Answer: A

Solution :

In given circuit, output of first NAND gate is \[\operatorname{Y}'\,\,=\,\,\overline{A\,\cdot \,\,B}\,\,=\,\,\overline{A}+\overline{B}\] \[\operatorname{Y}=\overline{Y}'=\overline{\overline{A}+\overline{B}}\] \[=\,\,\overline{\overline{A}}\,\,\cdot \,\,\overline{\overline{B}}=A\,\,\cdot \,\,B\]