CEE Kerala Engineering CEE Kerala Engineering Solved Paper-2006

  • question_answer
    The inputs and outputs for different time intervals are given below the NAND gate
    Time Input A Input B Output Y
    \[{{t}_{1}}\,to\,{{t}_{2}}\] 0 1 P
    \[{{t}_{2}}\,to\,{{t}_{3}}\] 0 0 Q
    \[{{t}_{3}}\,to\,{{t}_{4}}\] 1 0 R
    \[{{t}_{4}}\,to\,{{t}_{5}}\] 1 1 S
    The values taken by P, Q, R, S are respectively:

    A)  1, 1, 1, 0        

    B)         0, 1, 0, 1

    C)  0, 1, 0, 0        

    D)         1, 0, 1, 1

    E)  1, 0, 1, 0

    Correct Answer: A

    Solution :

    NAND gate is obtained when the output of AND gate is made as the input of NOT gate Boolean expression for NAND gate is: \[Y=\overline{A.B}\]
    A B Y
    0 0 1
    1 0 1
    0 1 1
    1 1 0


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