The circuit represents
A) NAND gate
B) OR gate
C) AND gate
D) NOR gate
Correct Answer: D
Solution :
Output of NOR gate \[y'=\overline{A+B}\] Output of NAND gate \[y'=\overline{(A+B)\cdot (A+B)}\] \[=\overline{\overline{(A+B)}}\cdot \overline{\overline{(A+B)}}\] \[=(A+B)(A+B)\] \[=A+B\] Output of NOT gate \[y''=\overline{A+B}\] \[\therefore \] The Boolean expression is for NOR gate.
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